1/8 march 2002 n high speed: t pd = 4.8ns (typ.) at v cc = 5v n low power dissipation: i cc = 8 m a(max.) at t a =25c n compatible with ttl outputs v ih = 2v (min.), v il = 0.8v (max.) n symmetrical output impedance: |i oh | = i ol = 24ma (min) at v cc = 4.5v n balanced propagation delays: t plh @ t phl n operating voltage range: v cc (opr) = 4.5v to 5.5v n function compatible with series 16373 and 16245 (244) n improved latch-up immunity n improved esd immunity description the 74act16244 is a low voltage cmos 16-bit d-type latch and 16 bit bus transceiver with 3-state output non inverting fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos tecnology. both functions can be used as 16 bit or dual octal devices, so the 16 bit transceiver can be used ad 8 bit bus buffer plus 8 bit transceiver, or only 16 bit buffer in select direction. this device can be used to integrate in one chip the internal logic component required to stv0701 to work ad p.o.d. interface in digital tv application. it si ideal for low power and high speed 4.5 to 5.5. applications. all inputs and outputs are equipped with protection circuits against static discharge, giving them esd immunity and transient excess voltage. 74act32701 16-bit d-type latch puls 16-bit bus buffer with 3-state outputs (non inverted) this is preliminary information on a new product now in development are or undergoing evaluation. details subject to change wit hout notice. order codes package tray t & r lfbga96 74ACT32701LB 74act32245lbr lfbga96 (top and bottom view) preliminary data logic diagram
74act32701 2/8 pin connection (top view) terminal assignment input and output equivalent circuit truth table (each 8bit section of 16bit latch) truth table (each 8bit section of 16bit transceiver) x : dont care z : high impedance abcdefghjklmnprt 6 1d2 1d4 1d6 1d8 2d2 2d4 2d6 2d7 3a2 3a4 3a6 3a8 4a2 4a4 4a6 4a7 5 1d1 1d3 1d5 1d7 2d1 2d3 2d5 2d8 3a1 3a3 3a5 3a7 4a1 4a3 4a5 4a8 4 1le gnd v cc gnd gnd v cc gnd 2le 3g gnd v cc gnd gnd v cc gnd 4g 3 1oe gnd v cc gnd gnd v cc gnd 2oe 3dir gnd v cc gnd gnd v cc gnd 4dir 2 1q1 1q3 1q5 1q7 2q1 2q3 2q5 2b8 3b1 3b3 3b5 3b7 4b1 4b3 4b5 4b8 1 1q2 1q4 1q6 1q8 2q2 2q4 2q6 2b7 3b2 3b4 3b6 3b8 4b2 4b4 4b6 4b7 inputs output oe le d q lhhh lhll llx q 0 hxxz inputs operation g dir l l b data to a bus l h a data to b bus h x isolation
74act32701 3/8 absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied. recommended operating conditions 1) v in from 0.8v to 2.0v symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 50 ma i cc or i gnd dc v cc or ground current 400 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 4.5 to 5.5 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -40 to 85 c dt/dv input rise and fall time v cc = 4.5 to 5.5v (note 1) 8 ns/v
74act32701 4/8 dc specifications 1) maximum test duration 2ms, one output loaded at time 2) incident wave switching is guaranteed on transmission lines with impedances as low as 50 w ac electrical characteristics (c l = 50 pf, r l = 500 w , input t r = t f = 3ns) (*) voltage range is 5.0v 0.5v symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c min. typ. max. min. max. v ih high level input voltage 4.5 v o = 0.1 v or v cc -0.1v 2.0 2.0 v 5.5 2.0 2.0 v il low level input voltage 4.5 v o = 0.1 v or v cc -0.1v 0.8 0.8 5.5 0.8 0.8 v v oh high level output voltage 4.5 i o =-50 m a 4.4 4.49 4.4 5.5 i o =-50 m a 5.4 5.49 5.4 4.5 i o =-24 ma 3.86 3.76 v 5.5 i o =-24 ma 4.86 4.76 v ol low level output voltage 4.5 i o =50 m a 0.001 0.1 0.1 5.5 i o =50 m a 0.001 0.1 0.1 4.5 i o =24 ma 0.36 0.44 5.5 i o =24 ma 0.36 0.44 i i input leakage current 5.5 v i = v cc or gnd 0.1 1 m a i oz high impedance output leakege current 5.5 v i = v ih or v iil v o = v cc or gnd 0.5 5 m a i cct max i cc /input 5.5 v i = v cc - 2.1v 0.9 1 ma i cc quiescent supply current 5.5 v i = v cc or gnd 880 m a i old dynamic output current (note 1, 2) 5.5 v old = 1.65 v max 75 ma i ohd v ohd = 3.85 v min -75 ma symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c min. typ. max. min. max. t plh propagation delay time 5.0 (*) 2.0 3.3 5.0 2.0 6.0 ns t phl 3.0 4.8 6.5 3.0 8.0 t pzl output enable time 5.0 (*) 4.0 6.5 8.7 4.0 9.7 ns t pzh 3.0 5.5 7.7 3.0 8.8 t plz output disabletime 5.0 (*) 4.0 6.0 8.0 4.0 9.2 ns t phz 3.0 4.6 6.4 3.0 7.3
74act32701 5/8 capacitive characteristics 1) c pd is defined as the value of the ics internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc /n (per circuit) test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r l = r 1 = 500 w or equivalent r t = z out of pulse generator (typically 50 w ) symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c min. typ. max. min. max. c in input capacitance 5.0 3.6 pf c out output capacitance 5.0 11 pf c pd power dissipation capaci- tance (note 1) 5.0 f in = 10mhz 42 pf test switch t plh, t phl open t pzl, t plz 2v cc t pzh, t phz gnd
74act32701 6/8 waveform 1: propagation delays (f=1mhz; 50% duty cycle) waveform 2: output enable and disable time (f=1mhz; 50% duty cycle)
74act32701 7/8 dim. mm. mils min. typ max. min. typ. max. a 13.40 13.60 527.5 535.4 b 5.40 5.60 212.6 220.5 c 1.6 63.0 d 0.5 19.7 e 0.8 31.5 f1 .15 45.3 lfbga96 mechanical data
74act32701 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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